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Asic Development Engineer

(לפני חודש )

The candidate will be part of the FPGA/Palladium development, working on the ASIC prototyping, Implement all design process including Synthesis, place & Route and timing optimizations, Interact closely with design and verification teams.

At least 5 years of experience in FPGA design
• BSc in Electrical Engineer
• Experienced with Virtex 7/ Altera or xilinx ultrascale
• Experienced with Vivado/Synplify/ProtoCompiler/Identify
• Experienced in ASIC prototyping
• Experienced in Verilog coding
• Experienced with Synopsys Haps platform
• Experienced with Palladium – Advantage